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Hardware-Conscious Data Processing (ST 2025) - tele-TASK
Prof. Dr. Tilmann Rabl
26 episodes
15 hours ago
Hardware development continuously advances, with different technologies improving at different paces. While the number of transistors in a CPU package grows, the single-core performance stagnates due to physical limitations. These trends require changes in data processing to keep database management systems efficient. In this lecture, we will take a look at current computer architectures and accelerator technologies and how they can be used for efficient data processing. We will cover CPU and memory architecture, the storage hierarchy, modern memory and storage technologies, such as NVMe, fast interconnects, such as Infiniband, NVLink, and CXL, and accelerators, such as GPUs and FPGAs. The course has a significant practical part, where the students learn to implement data structures and algorithms tailored to hardware-conscious data processing.
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Education
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All content for Hardware-Conscious Data Processing (ST 2025) - tele-TASK is the property of Prof. Dr. Tilmann Rabl and is served directly from their servers with no modification, redirects, or rehosting. The podcast is not affiliated with or endorsed by Podjoint in any way.
Hardware development continuously advances, with different technologies improving at different paces. While the number of transistors in a CPU package grows, the single-core performance stagnates due to physical limitations. These trends require changes in data processing to keep database management systems efficient. In this lecture, we will take a look at current computer architectures and accelerator technologies and how they can be used for efficient data processing. We will cover CPU and memory architecture, the storage hierarchy, modern memory and storage technologies, such as NVMe, fast interconnects, such as Infiniband, NVLink, and CXL, and accelerators, such as GPUs and FPGAs. The course has a significant practical part, where the students learn to implement data structures and algorithms tailored to hardware-conscious data processing.
Show more...
Courses
Education
Episodes (20/26)
Hardware-Conscious Data Processing (ST 2025) - tele-TASK
Task 4: GPU Join
3 months ago
12 minutes 8 seconds

Hardware-Conscious Data Processing (ST 2025) - tele-TASK
Summary
3 months ago
1 hour 16 minutes 39 seconds

Hardware-Conscious Data Processing (ST 2025) - tele-TASK
Field Programmable Gate Arrays
4 months ago
1 hour 13 minutes 49 seconds

Hardware-Conscious Data Processing (ST 2025) - tele-TASK
Data Processing on GPUs II
4 months ago
1 hour 24 minutes 25 seconds

Hardware-Conscious Data Processing (ST 2025) - tele-TASK
Data Processing on GPUs
4 months ago
1 hour 11 minutes 39 seconds

Hardware-Conscious Data Processing (ST 2025) - tele-TASK
Networking
4 months ago
1 hour 17 minutes 14 seconds

Hardware-Conscious Data Processing (ST 2025) - tele-TASK
Networking
4 months ago
1 hour 23 minutes 20 seconds

Hardware-Conscious Data Processing (ST 2025) - tele-TASK
Storage
4 months ago
1 hour 12 minutes 49 seconds

Hardware-Conscious Data Processing (ST 2025) - tele-TASK
Task 3: Buffer Manager
4 months ago
22 minutes 24 seconds

Hardware-Conscious Data Processing (ST 2025) - tele-TASK
Compute Express Link
4 months ago
1 hour 26 minutes 16 seconds

Hardware-Conscious Data Processing (ST 2025) - tele-TASK
Processing in Memory
4 months ago
1 hour 22 minutes 48 seconds

Hardware-Conscious Data Processing (ST 2025) - tele-TASK
Concurrency and Synchronization & Non-uniform Memory Access
5 months ago
1 hour 26 minutes 2 seconds

Hardware-Conscious Data Processing (ST 2025) - tele-TASK
Multicore Parallelism & Concurrency and Synchronization
5 months ago
1 hour 20 minutes 36 seconds

Hardware-Conscious Data Processing (ST 2025) - tele-TASK
Multicore Parallelism
5 months ago
1 hour 30 minutes 3 seconds

Hardware-Conscious Data Processing (ST 2025) - tele-TASK
Data Structures
5 months ago
1 hour 26 minutes 54 seconds

Hardware-Conscious Data Processing (ST 2025) - tele-TASK
Profiling
5 months ago
1 hour 17 minutes 40 seconds

Hardware-Conscious Data Processing (ST 2025) - tele-TASK
Vectorized Execution
6 months ago
1 hour 25 minutes 37 seconds

Hardware-Conscious Data Processing (ST 2025) - tele-TASK
Task 1: Query Processing
6 months ago
25 minutes 13 seconds

Hardware-Conscious Data Processing (ST 2025) - tele-TASK
Query Execution Models
6 months ago
1 hour 23 minutes 10 seconds

Hardware-Conscious Data Processing (ST 2025) - tele-TASK
Prefetching
6 months ago
1 hour 24 minutes 37 seconds

Hardware-Conscious Data Processing (ST 2025) - tele-TASK
Hardware development continuously advances, with different technologies improving at different paces. While the number of transistors in a CPU package grows, the single-core performance stagnates due to physical limitations. These trends require changes in data processing to keep database management systems efficient. In this lecture, we will take a look at current computer architectures and accelerator technologies and how they can be used for efficient data processing. We will cover CPU and memory architecture, the storage hierarchy, modern memory and storage technologies, such as NVMe, fast interconnects, such as Infiniband, NVLink, and CXL, and accelerators, such as GPUs and FPGAs. The course has a significant practical part, where the students learn to implement data structures and algorithms tailored to hardware-conscious data processing.