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Five Minute VHDL Podcast
Francesco Richichi
33 episodes
8 months ago
Let's talk about hardware design using VHDL
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Technology
Education
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Let's talk about hardware design using VHDL
Show more...
Technology
Education
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Q&A#06- How can I generate a new clock from a reference clock?
Five Minute VHDL Podcast
10 minutes
6 years ago
Q&A#06- How can I generate a new clock from a reference clock?
I receiver a question from Sandip. He got my reference, from my post on DDS.

The question is:
“I want to generate Square of 999kHz, 1000kHz and 1001kHzin VHDL Language and that would be implemented on a Zynq ZC702 evaluation board.
Is it possible by using the DDS.? Can you provide your expertise and comment on it.”

Website
https://surf-vhdl.com

Telegram channel
https://t.me/SurfVhdl

You can contact me
mail: podcast@surf-vhdl.com

Telegram:
https://t.me/francesco_surfvhdl

Teachable courses
https://surf-vhdl.link/courses

Music by Francis Preve - https://www.francispreve.com
Five Minute VHDL Podcast
Let's talk about hardware design using VHDL