As the semiconductor industry struggles with the limits of Moore’s Law, traditional monolithic scaling is no longer enough to meet performance, power, area and cost demands in technology, design, analysis, and manufacturing.
3D IC by Siemens is your go-to podcast for exploring the cutting-edge world of 3D IC packaging—a revolutionary approach reshaping semiconductor design, system integration, and heterogeneous computing.
Join industry leaders, engineers, and innovators as we break down advanced IC packaging solutions like 2.5D/3D IC, FCBGA, FOWLP, and more. Discover how chiplets, multi-die integration, and high-bandwidth memory (HBM) are driving higher performance, lower power consumption, and scalable architectures.
In each episode, we dive deep into the challenges and opportunities of IC design and manufacturing, including:
Roadmap for advanced packaging and heterogeneous integration in semiconductor scaling
Mainstream adoption of 3D IC—key challenges and breakthroughs
Optimizing micro-architecture and integration platforms for performance and efficiency
Strategic planning of chiplets and interposers for hierarchical device integration
Leveraging early predictive multi-physics analysis to enhance design accuracy
Automating design and routing for RDL-based fan-out wafer-level packaging (FOWLP)
Exploring glass substrates for superior electrical and thermal performance
Developing test-vehicles and daisy chain designs for architectural validation
Ensuring reliability and manufacturability in 3D IC heterogeneous integration
Mastering Signal Integrity (SI) and Power Integrity (PI) Analysis for high-speed systems
Managing thermal challenges in stacked die architectures
Subscribe now and stay ahead in the world of 3D IC.
Learn more: Siemens 3D IC Packaging Solutions
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As the semiconductor industry struggles with the limits of Moore’s Law, traditional monolithic scaling is no longer enough to meet performance, power, area and cost demands in technology, design, analysis, and manufacturing.
3D IC by Siemens is your go-to podcast for exploring the cutting-edge world of 3D IC packaging—a revolutionary approach reshaping semiconductor design, system integration, and heterogeneous computing.
Join industry leaders, engineers, and innovators as we break down advanced IC packaging solutions like 2.5D/3D IC, FCBGA, FOWLP, and more. Discover how chiplets, multi-die integration, and high-bandwidth memory (HBM) are driving higher performance, lower power consumption, and scalable architectures.
In each episode, we dive deep into the challenges and opportunities of IC design and manufacturing, including:
Roadmap for advanced packaging and heterogeneous integration in semiconductor scaling
Mainstream adoption of 3D IC—key challenges and breakthroughs
Optimizing micro-architecture and integration platforms for performance and efficiency
Strategic planning of chiplets and interposers for hierarchical device integration
Leveraging early predictive multi-physics analysis to enhance design accuracy
Automating design and routing for RDL-based fan-out wafer-level packaging (FOWLP)
Exploring glass substrates for superior electrical and thermal performance
Developing test-vehicles and daisy chain designs for architectural validation
Ensuring reliability and manufacturability in 3D IC heterogeneous integration
Mastering Signal Integrity (SI) and Power Integrity (PI) Analysis for high-speed systems
Managing thermal challenges in stacked die architectures
Subscribe now and stay ahead in the world of 3D IC.
Learn more: Siemens 3D IC Packaging Solutions
A common challenge faced when actualizing new technologies such as 3D IC is the lack of specialized tools to mass assemble them. That’s because their designs are normally developed by R&D teams that view commercialization as someone else’s task. At the moment, organizations are working to create and perfect the tools need to assemble 3D IC chips.
Today, John McMillan interviews John Ferguson, Director of Product Management, Dusan Petranovic, Principal Technologist, and Steve McKinney, Account Technology Manager. They’ll help us understand what a 3D IC verification workflow might look like.
In this episode, you’ll learn about the challenges associated with 3D IC integration and the components required to make it possible. You’ll also learn about the upgrades that have to be made to make 3D IC assembly possible. Additionally, you’ll hear about parasitic extraction and the tools available to execute it.
What You Will Learn In This Episode:
Challenges faced in the manufacture of 3D IC chips (02:01)
How to ensure that a 3D IC assembly line is aligned (04:18)
The challenges of integrating 3D IC (10:55)
The tools needed to make 3D IC integration possible (13:56)
Connect with Dusan Petranovic:
LinkedIn
Connect with Steve McKinney:
LinkedIn
Connect with John McMillan:
LinkedIn
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3D IC
As the semiconductor industry struggles with the limits of Moore’s Law, traditional monolithic scaling is no longer enough to meet performance, power, area and cost demands in technology, design, analysis, and manufacturing.
3D IC by Siemens is your go-to podcast for exploring the cutting-edge world of 3D IC packaging—a revolutionary approach reshaping semiconductor design, system integration, and heterogeneous computing.
Join industry leaders, engineers, and innovators as we break down advanced IC packaging solutions like 2.5D/3D IC, FCBGA, FOWLP, and more. Discover how chiplets, multi-die integration, and high-bandwidth memory (HBM) are driving higher performance, lower power consumption, and scalable architectures.
In each episode, we dive deep into the challenges and opportunities of IC design and manufacturing, including:
Roadmap for advanced packaging and heterogeneous integration in semiconductor scaling
Mainstream adoption of 3D IC—key challenges and breakthroughs
Optimizing micro-architecture and integration platforms for performance and efficiency
Strategic planning of chiplets and interposers for hierarchical device integration
Leveraging early predictive multi-physics analysis to enhance design accuracy
Automating design and routing for RDL-based fan-out wafer-level packaging (FOWLP)
Exploring glass substrates for superior electrical and thermal performance
Developing test-vehicles and daisy chain designs for architectural validation
Ensuring reliability and manufacturability in 3D IC heterogeneous integration
Mastering Signal Integrity (SI) and Power Integrity (PI) Analysis for high-speed systems
Managing thermal challenges in stacked die architectures
Subscribe now and stay ahead in the world of 3D IC.
Learn more: Siemens 3D IC Packaging Solutions
